1. Field of the Invention
This invention relates to a Josephson device, and more particularly to a Josephson device capable of providing a down-edge detecting circuit and a sense circuit which are each formed of a Josephson junction integrated circuit.
2. Discussion of Background
The Josephson device operates at high speed with extremely low power consumption. It is capable of providing switching elements of various types and promises to make possible a super-performance computer.
The basic quantum interference logic gate device utilizing the Josephson effect is formed of a closed loop structure incorporating at least two Josephson junctions and a control input line. This device assumes a voltage state by inputting a control current through the control input line to output a current through an output line connected to a current feed line called the "gate line". The operating mechanism, as well as the latching operation of the Josephson device, is well known in the art. In latching operation, once the current flowing through the control input line causes transition of the junction from the superconducting state (zero voltage state) to the resistive state (voltage state), the junction remains in the voltage state and continues to output an electric current through the output line even after the control input current is removed.
For some applications of the Josephson junction integrated circuit, another type of operation is required in which no output current appears during the rise of the control input current and an output current appears in the output line during the fall of the control input current. The circuit of this description is called a down-edge detecting circuit. It finds utility, for example, in a sense-bus circuit for a memory circuit. Realization of this utility, however, is not easy because the Josephson device is characterized by operating in the latching mode as described above.
There has been proposed a down-edge detecting circuit using Josephson junctions (S. M. Faris and A. Davidson, "Josephson edge detector, a novel switching element", IEEE Transactions on Magnetics, Vol. MAG-15, No. 1, pp. 416-419, January 1979). The down-edge detecting circuit is composed of a quantum interference gate with an extremely asymmetrical control characteristic by setting the magnitudes of the Josephson currents of a plurality of Josephson junctions composing the gate at extremely different values, by suitably selecting the position for injection of a gate current to the aforementioned closed loop circuit, and by setting the magnitude of the inductance composing the gate at a large value. Such a quantum interference gate produces extreme asymmetry in the critical points which appear on both sides of vortex mode in a control characteristic and defines the boundary between vortex-to-vortex switchings.
The value of the gate current is set between the values of the gate current corresponding to the upper critical point and the lower critical point so that, upon application of an input current with one polarity, the transition of the operating point in the vortex mode occurs below the upper critical point to give rise to a switching to another vortex mode with no output current and, on the other hand, upon elimination of an input current, the transition of the operating point in the vortex mode occurs above the lower critical point to give rise to a switching to the voltage state and the output current begins to flow through the output line.
The down-edge detecting circuit by the method described above, however, entails the following disadvantage. The gate currents of the aforementioned gate circuit are required to be set between the gate currents of the values corresponding to the upper critical point and the lower critical point. For the gate currents to have sufficient operating margins, the aforementioned values of the critical points are required to be set wide apart. Wide differentiation of the values of the critical points to ensure wide operating margins implies the necessity of sufficiently increasing both the values of inductance and the ratio between the critical currents of the Josephson junctions. Realization of inductance with a large value on actual integrated circuit chips entails a marked addition to the area occupied in such chips. An increase in the ratio between the critical currents of the Josephson junction entails an increase in the area occupied by the junctions with larger critical current because of the technological limit on fabrication of junctions with small size. Thus, neither of the measures proves appropriate for the purpose of high integration of circuits. Further, since the critical points are strongly affected by the dynamic operating property of the gate, it has been difficult to design and realize these points at proper values.